When VM=1, the protected-mode bit goes low and the Entry PLA selects real-mode entry points -- MOV ES, reg takes the one-line path. Meanwhile, CPL is hardwired to 3 whenever VM=1, so the V86 task always runs at the lowest privilege level, under full paging protection. The OS can use paging to virtualize the 8086's 1 MB address space, even simulating A20 address line wraparound by mapping pages to the same physical frames.
“以前我们定期做清洁生产审核，审核流程繁琐，工作周期长。”周福彪说，参与试点后，两地审核“一把尺”，审核结果共享互认，光审核费用一次就能节省10余万元。
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